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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h File Reference</title>
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  <div class="headertitle"><div class="title">stm32h7xx_hal_gpio_ex.h File Reference</div></div>
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<p>Header file of GPIO HAL Extension module.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;<a class="el" href="stm32h7xx__hal__def_8h_source.html">stm32h7xx_hal_def.h</a>&quot;</code><br />
</div>
<p><a href="stm32h7xx__hal__gpio__ex_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga93a65e75bfe22810f2e8f8eff9b3618b" id="r_ga93a65e75bfe22810f2e8f8eff9b3618b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF0_RTC_50Hz</b>&#160;&#160;&#160;((uint8_t)0x00)  /* RTC_50Hz Alternate Function mapping                                                     */</td></tr>
<tr class="memdesc:ga93a65e75bfe22810f2e8f8eff9b3618b"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 0 selection. <br /></td></tr>
<tr class="memitem:ga2c2c2ebb2b09db35be06740566eeda5d" id="r_ga2c2c2ebb2b09db35be06740566eeda5d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF0_MCO</b>&#160;&#160;&#160;((uint8_t)0x00)  /* MCO (MCO1 and MCO2) Alternate Function mapping                                          */</td></tr>
<tr class="memitem:gaa2f012907797b7a0d3ef1831cb8f013f" id="r_gaa2f012907797b7a0d3ef1831cb8f013f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF0_SWJ</b>&#160;&#160;&#160;((uint8_t)0x00)  /* SWJ (SWD and JTAG) Alternate Function mapping                                           */</td></tr>
<tr class="memitem:gac1758cd3f314560efb44c2fa504d6f7c" id="r_gac1758cd3f314560efb44c2fa504d6f7c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF0_LCDBIAS</b>&#160;&#160;&#160;((uint8_t)0x00)  /* LCDBIAS Alternate Function mapping                                                      */</td></tr>
<tr class="memitem:gab8c8f038d314b7bf2d62bce189d45877" id="r_gab8c8f038d314b7bf2d62bce189d45877"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF0_TRACE</b>&#160;&#160;&#160;((uint8_t)0x00)  /* TRACE Alternate Function mapping                                                        */</td></tr>
<tr class="memitem:ga232695759304748cda241cc00e0680e5" id="r_ga232695759304748cda241cc00e0680e5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF1_TIM1</b>&#160;&#160;&#160;((uint8_t)0x01)  /* TIM1 Alternate Function mapping   */</td></tr>
<tr class="memdesc:ga232695759304748cda241cc00e0680e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 1 selection. <br /></td></tr>
<tr class="memitem:ga4a124b0badec1580f1581a5fccd32ade" id="r_ga4a124b0badec1580f1581a5fccd32ade"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF1_TIM2</b>&#160;&#160;&#160;((uint8_t)0x01)  /* TIM2 Alternate Function mapping   */</td></tr>
<tr class="memitem:gac796ac1543858321a4f2021d34955e8f" id="r_gac796ac1543858321a4f2021d34955e8f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF1_TIM16</b>&#160;&#160;&#160;((uint8_t)0x01)  /* TIM16 Alternate Function mapping  */</td></tr>
<tr class="memitem:gaf209ec61fb3daade33ba3895f939bb91" id="r_gaf209ec61fb3daade33ba3895f939bb91"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF1_TIM17</b>&#160;&#160;&#160;((uint8_t)0x01)  /* TIM17 Alternate Function mapping  */</td></tr>
<tr class="memitem:gabef2075113c988d8e61fb4b553ed1f43" id="r_gabef2075113c988d8e61fb4b553ed1f43"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF1_LPTIM1</b>&#160;&#160;&#160;((uint8_t)0x01)  /* LPTIM1 Alternate Function mapping */</td></tr>
<tr class="memitem:ga13b34ce8addd55c988983196dd3a83f5" id="r_ga13b34ce8addd55c988983196dd3a83f5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF1_FMC</b>&#160;&#160;&#160;((uint8_t)0x01)  /* FMC Alternate Function mapping : available on STM32H72xxx/STM32H73xxx */</td></tr>
<tr class="memitem:ga41e7dab432740a5fff4084890764242f" id="r_ga41e7dab432740a5fff4084890764242f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF2_TIM3</b>&#160;&#160;&#160;((uint8_t)0x02)  /* TIM3 Alternate Function mapping   */</td></tr>
<tr class="memdesc:ga41e7dab432740a5fff4084890764242f"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 2 selection. <br /></td></tr>
<tr class="memitem:gaea624d501cf9bbc28e01bcba9270b895" id="r_gaea624d501cf9bbc28e01bcba9270b895"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF2_TIM4</b>&#160;&#160;&#160;((uint8_t)0x02)  /* TIM4 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga8b122f3db7f4a483f5e268543ccf60ba" id="r_ga8b122f3db7f4a483f5e268543ccf60ba"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF2_TIM5</b>&#160;&#160;&#160;((uint8_t)0x02)  /* TIM5 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga50cf7180fc1c8587760510e0c7e4e5a0" id="r_ga50cf7180fc1c8587760510e0c7e4e5a0"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF2_TIM12</b>&#160;&#160;&#160;((uint8_t)0x02)  /* TIM12 Alternate Function mapping  */</td></tr>
<tr class="memitem:ga25816939c34abda1ff9cfec7637f1867" id="r_ga25816939c34abda1ff9cfec7637f1867"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF2_SAI1</b>&#160;&#160;&#160;((uint8_t)0x02)  /* SAI1 Alternate Function mapping   */</td></tr>
<tr class="memitem:gac57e4297310e4df6843a3c8559e93c7c" id="r_gac57e4297310e4df6843a3c8559e93c7c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF2_TIM15</b>&#160;&#160;&#160;((uint8_t)0x02)  /* TIM15 Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */</td></tr>
<tr class="memitem:gaf090cae245bfae075661c330c470c3f4" id="r_gaf090cae245bfae075661c330c470c3f4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_TIM8</b>&#160;&#160;&#160;((uint8_t)0x03)  /* TIM8 Alternate Function mapping   */</td></tr>
<tr class="memdesc:gaf090cae245bfae075661c330c470c3f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 3 selection. <br /></td></tr>
<tr class="memitem:ga9972e6aea1ef36828b962a3f039a5398" id="r_ga9972e6aea1ef36828b962a3f039a5398"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_LPTIM2</b>&#160;&#160;&#160;((uint8_t)0x03)  /* LPTIM2 Alternate Function mapping */</td></tr>
<tr class="memitem:gac4d74381d99148f166abd7c56b5da270" id="r_gac4d74381d99148f166abd7c56b5da270"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_DFSDM1</b>&#160;&#160;&#160;((uint8_t)0x03)  /* DFSDM Alternate Function mapping  */</td></tr>
<tr class="memitem:gaa3b6c7c20bd56b6a7970c2bf41e48422" id="r_gaa3b6c7c20bd56b6a7970c2bf41e48422"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_LPTIM3</b>&#160;&#160;&#160;((uint8_t)0x03)  /* LPTIM3 Alternate Function mapping */</td></tr>
<tr class="memitem:ga7769092b39672fed5e5620f9d8ec8cc3" id="r_ga7769092b39672fed5e5620f9d8ec8cc3"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_LPTIM4</b>&#160;&#160;&#160;((uint8_t)0x03)  /* LPTIM4 Alternate Function mapping */</td></tr>
<tr class="memitem:ga3a6d21d41f2540c1e8570e8063cccc51" id="r_ga3a6d21d41f2540c1e8570e8063cccc51"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_LPTIM5</b>&#160;&#160;&#160;((uint8_t)0x03)  /* LPTIM5 Alternate Function mapping */</td></tr>
<tr class="memitem:ga5f0da41681c13e290b8ca5c1e25885ac" id="r_ga5f0da41681c13e290b8ca5c1e25885ac"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_LPUART</b>&#160;&#160;&#160;((uint8_t)0x03)  /* LPUART Alternate Function mapping */</td></tr>
<tr class="memitem:ga80dc15eb9d11733811c1db6c8fc18b3e" id="r_ga80dc15eb9d11733811c1db6c8fc18b3e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF3_LTDC</b>&#160;&#160;&#160;((uint8_t)0x03)  /* LTDC Alternate Function mapping : available on STM32H72xxx/STM32H73xxx */</td></tr>
<tr class="memitem:ga756e49236633954d1e86cc01c03fb518" id="r_ga756e49236633954d1e86cc01c03fb518"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_I2C1</b>&#160;&#160;&#160;((uint8_t)0x04)  /* I2C1 Alternate Function mapping   */</td></tr>
<tr class="memdesc:ga756e49236633954d1e86cc01c03fb518"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 4 selection. <br /></td></tr>
<tr class="memitem:gac0a21510acee65b71f4f9da497de8834" id="r_gac0a21510acee65b71f4f9da497de8834"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_I2C2</b>&#160;&#160;&#160;((uint8_t)0x04)  /* I2C2 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga2ac25d0b23bd43deeed4f4201e1cc275" id="r_ga2ac25d0b23bd43deeed4f4201e1cc275"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_I2C3</b>&#160;&#160;&#160;((uint8_t)0x04)  /* I2C3 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga4b512f0fdb5619f3f6a82cdd747bd9ab" id="r_ga4b512f0fdb5619f3f6a82cdd747bd9ab"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_I2C4</b>&#160;&#160;&#160;((uint8_t)0x04)  /* I2C4 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga50799ca5441633ca024fb886595d5795" id="r_ga50799ca5441633ca024fb886595d5795"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_TIM15</b>&#160;&#160;&#160;((uint8_t)0x04)  /* TIM15 Alternate Function mapping  */</td></tr>
<tr class="memitem:ga23fd0eb8bcd3c2b58329c17c85d5eb78" id="r_ga23fd0eb8bcd3c2b58329c17c85d5eb78"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_CEC</b>&#160;&#160;&#160;((uint8_t)0x04)  /* CEC Alternate Function mapping    */</td></tr>
<tr class="memitem:gaf6175af27c0595958c02e58ea3ae0af7" id="r_gaf6175af27c0595958c02e58ea3ae0af7"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_LPTIM2</b>&#160;&#160;&#160;((uint8_t)0x04)  /* LPTIM2 Alternate Function mapping */</td></tr>
<tr class="memitem:gaec055b1bbed4b62a1c3617ac9144ff11" id="r_gaec055b1bbed4b62a1c3617ac9144ff11"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_USART1</b>&#160;&#160;&#160;((uint8_t)0x04)  /* USART1 Alternate Function mapping */</td></tr>
<tr class="memitem:ga9c5ea49aa306b217df055ed1d7b2c81a" id="r_ga9c5ea49aa306b217df055ed1d7b2c81a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_DFSDM1</b>&#160;&#160;&#160;((uint8_t)0x04)  /* DFSDM  Alternate Function mapping */</td></tr>
<tr class="memitem:ga66aa13f6390dda4db73c94235e32293f" id="r_ga66aa13f6390dda4db73c94235e32293f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF4_DCMI</b>&#160;&#160;&#160;((uint8_t)0x04)   /* DCMI Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */</td></tr>
<tr class="memitem:gafb369e90efa49bcc298fd354b79cf11a" id="r_gafb369e90efa49bcc298fd354b79cf11a"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF5_SPI1</b>&#160;&#160;&#160;((uint8_t)0x05)  /* SPI1 Alternate Function mapping   */</td></tr>
<tr class="memdesc:gafb369e90efa49bcc298fd354b79cf11a"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 5 selection. <br /></td></tr>
<tr class="memitem:ga0f61d8c59eaf80aec23bbe58c64bc11d" id="r_ga0f61d8c59eaf80aec23bbe58c64bc11d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF5_SPI2</b>&#160;&#160;&#160;((uint8_t)0x05)  /* SPI2 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga6f153ff6680bf07a86191671b89cc583" id="r_ga6f153ff6680bf07a86191671b89cc583"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF5_SPI3</b>&#160;&#160;&#160;((uint8_t)0x05)  /* SPI3 Alternate Function mapping   */</td></tr>
<tr class="memitem:gae906bb43a748bb865cb7a721d2c5d14e" id="r_gae906bb43a748bb865cb7a721d2c5d14e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF5_SPI4</b>&#160;&#160;&#160;((uint8_t)0x05)  /* SPI4 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga82ab341258ae0733c7d123df601d945f" id="r_ga82ab341258ae0733c7d123df601d945f"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF5_SPI5</b>&#160;&#160;&#160;((uint8_t)0x05)  /* SPI5 Alternate Function mapping   */</td></tr>
<tr class="memitem:gab29f3d34b32916576ecf405a658086cc" id="r_gab29f3d34b32916576ecf405a658086cc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF5_SPI6</b>&#160;&#160;&#160;((uint8_t)0x05)  /* SPI6 Alternate Function mapping   */</td></tr>
<tr class="memitem:gafd9730d92d75cdd08cbf51d9bfffde9d" id="r_gafd9730d92d75cdd08cbf51d9bfffde9d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF5_CEC</b>&#160;&#160;&#160;((uint8_t)0x05)  /* CEC  Alternate Function mapping   */</td></tr>
<tr class="memitem:ga1da9c47feac80dcd9b9b9e3ca0d8f07e" id="r_ga1da9c47feac80dcd9b9b9e3ca0d8f07e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF6_SPI2</b>&#160;&#160;&#160;((uint8_t)0x06)  /* SPI2 Alternate Function mapping   */</td></tr>
<tr class="memdesc:ga1da9c47feac80dcd9b9b9e3ca0d8f07e"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 6 selection. <br /></td></tr>
<tr class="memitem:gad229e64449bd2a2162c3d283e794a4e4" id="r_gad229e64449bd2a2162c3d283e794a4e4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF6_SPI3</b>&#160;&#160;&#160;((uint8_t)0x06)  /* SPI3 Alternate Function mapping   */</td></tr>
<tr class="memitem:ga8ffda74e53816c1e424a292c08e4f8c1" id="r_ga8ffda74e53816c1e424a292c08e4f8c1"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF6_SAI1</b>&#160;&#160;&#160;((uint8_t)0x06)  /* SAI1 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF6_I2C4</b>&#160;&#160;&#160;((uint8_t)0x06)  /* I2C4 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF6_DFSDM1</b>&#160;&#160;&#160;((uint8_t)0x06)  /* DFSDM Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF6_UART4</b>&#160;&#160;&#160;((uint8_t)0x06)  /* UART4 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_SPI2</b>&#160;&#160;&#160;((uint8_t)0x07)  /* SPI2 Alternate Function mapping   */</td></tr>
<tr class="memdesc:ga8ac6139fdac7acc7ff49575424b1e145"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 7 selection. <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_SPI3</b>&#160;&#160;&#160;((uint8_t)0x07)  /* SPI3 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_SPI6</b>&#160;&#160;&#160;((uint8_t)0x07)  /* SPI6 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_USART1</b>&#160;&#160;&#160;((uint8_t)0x07)  /* USART1 Alternate Function mapping */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_USART2</b>&#160;&#160;&#160;((uint8_t)0x07)  /* USART2 Alternate Function mapping */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_USART3</b>&#160;&#160;&#160;((uint8_t)0x07)  /* USART3 Alternate Function mapping */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_USART6</b>&#160;&#160;&#160;((uint8_t)0x07)  /* USART6 Alternate Function mapping */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_UART7</b>&#160;&#160;&#160;((uint8_t)0x07)  /* UART7 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF7_SDMMC1</b>&#160;&#160;&#160;((uint8_t)0x07)  /* SDMMC1 Alternate Function mapping */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF8_SPI6</b>&#160;&#160;&#160;((uint8_t)0x08)  /* SPI6 Alternate Function mapping   */</td></tr>
<tr class="memdesc:ga6c0bfc231795088ae66a9fadd5a3500c"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 8 selection. <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF8_UART4</b>&#160;&#160;&#160;((uint8_t)0x08)  /* UART4 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF8_UART5</b>&#160;&#160;&#160;((uint8_t)0x08)  /* UART5 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF8_UART8</b>&#160;&#160;&#160;((uint8_t)0x08)  /* UART8 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF8_SPDIF</b>&#160;&#160;&#160;((uint8_t)0x08)  /* SPDIF Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF8_LPUART</b>&#160;&#160;&#160;((uint8_t)0x08)  /* LPUART Alternate Function mapping */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF8_SDMMC1</b>&#160;&#160;&#160;((uint8_t)0x08)  /* SDMMC1 Alternate Function mapping */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_FDCAN1</b>&#160;&#160;&#160;((uint8_t)0x09)  /* FDCAN1 Alternate Function mapping   */</td></tr>
<tr class="memdesc:gaf913dd9d2d9d68c96a36b723f156aaf1"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 9 selection. <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_FDCAN2</b>&#160;&#160;&#160;((uint8_t)0x09)  /* FDCAN2 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_TIM13</b>&#160;&#160;&#160;((uint8_t)0x09)  /* TIM13 Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_TIM14</b>&#160;&#160;&#160;((uint8_t)0x09)  /* TIM14 Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_SDMMC2</b>&#160;&#160;&#160;((uint8_t)0x09)  /* SDMMC2 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_LTDC</b>&#160;&#160;&#160;((uint8_t)0x09)  /* LTDC Alternate Function mapping     */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_SPDIF</b>&#160;&#160;&#160;((uint8_t)0x09)  /* SPDIF Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF9_FMC</b>&#160;&#160;&#160;((uint8_t)0x09)  /* FMC Alternate Function mapping      */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_SDMMC2</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* SDMMC2 Alternate Function mapping                                           */</td></tr>
<tr class="memdesc:gada6fd0d10731420eac64904e9ae3bbbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 10 selection. <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_COMP1</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* COMP1 Alternate Function mapping                                            */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_COMP2</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* COMP2 Alternate Function mapping                                            */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_CRS_SYNC</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* CRS Sync Alternate Function mapping : available on <a class="el" href="group___library__configuration__section.html#ga3cee03fca286b4756b2df120eaeef227">STM32H7</a> Rev.B and above  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_OTG1_FS</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* OTG1_FS Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_OTG1_HS</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* OTG1_HS Alternate Function mapping                                          */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_TIM8</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* TIM8 Alternate Function mapping                                             */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF10_FMC</b>&#160;&#160;&#160;((uint8_t)0x0A)  /* FMC Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_SWP</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* SWP Alternate Function mapping     */</td></tr>
<tr class="memdesc:ga036dc1e2852f1f3cb9edc27278c57d6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 11 selection. <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_MDIOS</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* MDIOS Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_UART7</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* UART7 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_SDMMC2</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* SDMMC2 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_DFSDM1</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* DFSDM1 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_COMP1</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* COMP1 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_COMP2</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* COMP2 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_TIM1</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* TIM1 Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_TIM8</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* TIM8 Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF11_I2C4</b>&#160;&#160;&#160;((uint8_t)0x0B)  /* I2C4 Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF12_FMC</b>&#160;&#160;&#160;((uint8_t)0x0C)  /* FMC Alternate Function mapping     */</td></tr>
<tr class="memdesc:ga56d7cc07c907d85e043eb44e4b9b4540"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 12 selection. <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF12_SDMMC1</b>&#160;&#160;&#160;((uint8_t)0x0C)  /* SDMMC1 Alternate Function mapping  */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF12_MDIOS</b>&#160;&#160;&#160;((uint8_t)0x0C)  /* MDIOS Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF12_COMP1</b>&#160;&#160;&#160;((uint8_t)0x0C)  /* COMP1 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF12_COMP2</b>&#160;&#160;&#160;((uint8_t)0x0C)  /* COMP2 Alternate Function mapping   */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF12_TIM1</b>&#160;&#160;&#160;((uint8_t)0x0C)  /* TIM1 Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF12_TIM8</b>&#160;&#160;&#160;((uint8_t)0x0C)  /* TIM8 Alternate Function mapping    */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF13_DCMI</b>&#160;&#160;&#160;((uint8_t)0x0D)   /* DCMI Alternate Function mapping  */</td></tr>
<tr class="memdesc:gac7ccbdfe96d75805d7fc7dcd821d0fb4"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 13 selection. <br /></td></tr>
<tr class="memitem:ga9ac8afd960c3461e62713adc522dad81" id="r_ga9ac8afd960c3461e62713adc522dad81"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF13_COMP1</b>&#160;&#160;&#160;((uint8_t)0x0D)   /* COMP1 Alternate Function mapping */</td></tr>
<tr class="memitem:gae4e831a78bd8fa408c12fac4e3e8ffd6" id="r_gae4e831a78bd8fa408c12fac4e3e8ffd6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF13_COMP2</b>&#160;&#160;&#160;((uint8_t)0x0D)   /* COMP2 Alternate Function mapping */</td></tr>
<tr class="memitem:gade37f38bcb0af495331df18a0ae4f1db" id="r_gade37f38bcb0af495331df18a0ae4f1db"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF13_TIM1</b>&#160;&#160;&#160;((uint8_t)0x0D)    /* TIM1 Alternate Function mapping */</td></tr>
<tr class="memitem:gaddcf951df3b0e08fb211f176b9c2db7b" id="r_gaddcf951df3b0e08fb211f176b9c2db7b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF14_LTDC</b>&#160;&#160;&#160;((uint8_t)0x0E)   /* LTDC Alternate Function mapping  */</td></tr>
<tr class="memdesc:gaddcf951df3b0e08fb211f176b9c2db7b"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 14 selection. <br /></td></tr>
<tr class="memitem:ga883db89884b7aebd81913fa46d55fe61" id="r_ga883db89884b7aebd81913fa46d55fe61"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF14_UART5</b>&#160;&#160;&#160;((uint8_t)0x0E)   /* UART5 Alternate Function mapping */</td></tr>
<tr class="memitem:ga6a9e7cd61d906b36a1044acef59d245e" id="r_ga6a9e7cd61d906b36a1044acef59d245e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIO_AF15_EVENTOUT</b>&#160;&#160;&#160;((uint8_t)0x0F)  /* EVENTOUT Alternate Function mapping */</td></tr>
<tr class="memdesc:ga6a9e7cd61d906b36a1044acef59d245e"><td class="mdescLeft">&#160;</td><td class="mdescRight">AF 15 selection. <br /></td></tr>
<tr class="memitem:ga79eead44ddc05f1aa13d93c69196bced" id="r_ga79eead44ddc05f1aa13d93c69196bced"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___g_p_i_o___alternate__function__selection.html#ga79eead44ddc05f1aa13d93c69196bced">IS_GPIO_AF</a>(AF)</td></tr>
<tr class="memitem:ga03af8278605f5f2b68137ab0dfbcb725" id="r_ga03af8278605f5f2b68137ab0dfbcb725"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOA_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memdesc:ga03af8278605f5f2b68137ab0dfbcb725"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO pin available on the platform. <br /></td></tr>
<tr class="memitem:gade48da5c54f9f57c5ea1b3b4a746f04b" id="r_gade48da5c54f9f57c5ea1b3b4a746f04b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOB_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memitem:ga043750fbb7c18bc80c56c94b97fe8977" id="r_ga043750fbb7c18bc80c56c94b97fe8977"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOC_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memitem:gaf7229c143190bfcddc6300b8a5e9c774" id="r_gaf7229c143190bfcddc6300b8a5e9c774"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOD_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memitem:ga06b6d6771050b0b4e5254fe44ebf9a2e" id="r_ga06b6d6771050b0b4e5254fe44ebf9a2e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOE_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memitem:ga4ffb721d0a561402bb59dfd1a2c60687" id="r_ga4ffb721d0a561402bb59dfd1a2c60687"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOF_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memitem:ga2fa4bb73d8419587c864e1ad616e715d" id="r_ga2fa4bb73d8419587c864e1ad616e715d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOG_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memitem:ga44263c8840703ae6339fdaae450f1c1c" id="r_ga44263c8840703ae6339fdaae450f1c1c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOJ_PIN_AVAILABLE</b>&#160;&#160;&#160;(GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 )</td></tr>
<tr class="memitem:ga1e3679da100230d531f982a46ccf86e6" id="r_ga1e3679da100230d531f982a46ccf86e6"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOH_PIN_AVAILABLE</b>&#160;&#160;&#160;GPIO_PIN_All</td></tr>
<tr class="memitem:gaa5b30a5e8a7718cf07634af6e868885c" id="r_gaa5b30a5e8a7718cf07634af6e868885c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>GPIOK_PIN_AVAILABLE</b>&#160;&#160;&#160;(GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 )</td></tr>
<tr class="memitem:ga3830db89326a2268d296a6498fd31384" id="r_ga3830db89326a2268d296a6498fd31384"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___g_p_i_o_ex___get___port___index.html#ga3830db89326a2268d296a6498fd31384">GPIO_GET_INDEX</a>(__GPIOx__)</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Header file of GPIO HAL Extension module. </p>
<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
<dl class="section attention"><dt>Attention</dt><dd></dd></dl>
<p>Copyright (c) 2017 STMicroelectronics. All rights reserved.</p>
<p>This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS. </p>
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